1.

図書
図書
1. Logic synthesis and verification
eds.: Soha Hassoun, Tsutomu Sasao ; consulting ed.: Robert K. Brayton
出版情報: Boston : Kluwer Academic Publishers, c2002
シリーズ名: The Kluwer international series in engineering and computer science ; SECS 654
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2.

図書
図書
2. Logic minimization algorithms for VLSI synthesis
by Robert K. Brayton [et al.]
出版情報: Boston : Kluwer Academic Publishers, c1984
シリーズ名: The Kluwer international series in engineering and computer science ; SECS 2 . VLSI, computer architecture, and digital signal processing
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